Laminated multilayer boards provided with internal wiring are well known as illustrated and described in U.S. Pat. No. 3,564,114. Multilayer ceramic substrates capable of mounting and interconnecting a plurality of semiconductor devices are also well known as indicated by an article entitled "A Fabrication Technique For Multilayer Ceramic Modules" by H. D. Keiser, et al in Solid State Technology May 1972 P. 35-40. In this technology green sheets of ceramic, i.e., ceramic powder held together in sheet form by temporary organic binder are metallized with noble or refractory metals, usually by screen printing. The metallized sheets are stacked, laminated, and fired to form a monolithic metal package. This technology affords an opportunity to do three-dimensional wiring in what was formerly waste or inexcessible space in a ceramic substrate. The use of this "waste space" results in the creation of the high-density, sturdy electronic package with good performance and reliability. With the advent of microminiaturized large-scale integrated circuit semiconductor devices with their accompanying faster speeds of operation, the compatability of the substrate and the devices supported thereon become increasingly important. In order to control and predict the operating characteristics of the substrate such as signal delay, cross-talk, etc., it becomes increasingly important to control the impedence and capacitance characteristics of the internal wiring, as well as the length. The increased density of the semiconductor devices also imposes formidable cooling requirements in order to maintain the temperature of the devices at a safe operating range during operation.